Technological Subject: Case-based retrieval for re-use of intellectual properties in the design of integrated circuits
Homepage: http://toolip.fzi.de/
Partially funded by: Funded by the German Ministry of Research and Education
Objective/Scope:
TOOLIP's main goal is to address the complexity of current system design in networking, high-speed links, multimedia and automotive domains by using system-level modeling and verification techniques, applying design reuse with qualified and parametric IP cores, and providing a seamless design flow integrating existing and emerging tools. The industrial partners and their applications will be the driving forces of TOOLIP. The close cooperation of IP users, IP providers, designers and research institutes constitutes one of the major potentials of the consortium.
Partners:
FZI Karlsruhe
ST Microelectronis (Deputy leader)
Bull S.A.
CEA-LETI
Design & Reuse
Deutsche Thomson-Brandt GmbH
empolis GmbH
IMSE_CNM
Infineon Technologies
ISD
Philips Semiconductors
Sci-Worx GmbH
SIDSA
Siemens AG
STM s.a.
THALES Communications
THOMSON multimedia
TILAB
Universidaf Politecnica de Madrid
University of Ancona
University of Bologna
University of Paderborn
METASymbiose S.A.
University of Kaiserslautern
University of Torino
University of Hildesheim
